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development-ready memory interface

Examples with "development-ready memory interface" and their translation in Chinese

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The memory interface includes separate buses for program space and data space.
存储器接口包括独立的程序空间总线和数据空间总线。
They carry external circuitry, such as transceivers, sensors, memory interfaces, displays and many more.
它们带有收发器、传感器、存储器接口、显示设备及其它多种外部电路。
External memory interface, temperature sensor and voltage reference
外部存储器接口、温度感应器和电压基准
Xilinx memory interface solutions are based on hardware-verified reference designs and software tools that enable you to quickly generate your own custom design.
Xilinx 存储器接口解决方案基于硬件验证的参考设计和软件工具,让您能够迅速生成您自己的定制设计。
Using this feature, Mike knew that changes between the FPGA and memory interface corrections would be synchronized.
Mike知道,如果使用该功能FPGA和存储器接口之间的信号定义就会保持同步。
Customers can select a suitable SLC NAND device according to the error correction capability and memory interface of host controller.
客户可以根据设计中主控的ECC能力和存储器接口灵活地选择合适的SLC NAND产品。
It combines a six-stage, superscalar pipeline with flexible system and memory interfaces, caches and tightly coupled memories with floating point and DSP performance.
它将六级超标量流水线和灵活的系统结合,还将内存接口、缓存和紧耦合存储器与浮点运算单元和 DSP 性能融于一身。
The paper also takes SRAM interface design as one example to describe how to design external memory interface.
并以SRAM的接口设计为例简单的介绍了如何进行外部存储器的接口设计。
Ground-breaking 1 TB/s memory bandwidth and a 4,096-bit memory interface paves the way for ultra-high resolution textures, hyper-realistic settings and life-like characters.
突破性的1TB/s显存带宽和4096位显存接口为超高分辨率纹理,超现实设置和逼真角色铺平了道路。
The interface system 320 is illustrated as including a memory interface circuit 325, which is electrically coupled to a central bus.
示出接口系统320包括存储器接口电路325,该存储器接口电路325电耦接到中央总线。
For example, the design's complex, high density layout made it difficult to achieve a length matched, impedance-controlled memory layout between the FPGA and memory interfaces.
例如,复杂高密度的布局 布线,使得FPGA和存储器 接口之间的长度匹配, 阻抗控制变得困难。
With its twin sophisticated MAF floating point units and huge wide and low latency memory interfaces, P2SC was primarily targeted at engineering and scientific applications.
因具有兩個精密的MAF浮點運算單元和寬且低延遲的記憶體界面,P2SC主要瞄準工程和科學應用。
With 2 GB GDDR5 and a class-leading 256-bit memory interface, you have the power to handle the demanding games today and tomorrow.
搭配 2 GB GDDR5 和先进的 256 位显存接口,能够流畅运行现在和将来的高端游戏。
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