Adata Micro SDCH flash card offers automatic way for detecting and correcting errors that occur while transferring files using Error Correcting Code (ECC) facility.
During the Beginning of Life (BOL) and End of Life (EOL) of the NAND Flash, these bit errors are then detected and corrected by the embedded Error Correcting Code (ECC) component.
In the related-art technology described above, two types of sizes of units in which access is allowed are arranged in order to execute error detection and correction processing in each of the sizes. However, because this related-art technology generates, in the random access bank, an error correcting code in a data unit smaller than that of the sequential access bank, a capacity occupied by error correcting codes gets relatively large, thereby causing a problem of the deteriorated efficiency of capacity. In this case, if the storage capacity in the random access bank runs short, it is necessary to move part of the data to the sequential access bank, thereby causing a problem of lowered system performance. Generally, in terms of bit cost, the random access bank is several times as large as the sequential access bank, so that increasing the capacity of the random access bank directly increases the system cost.
By deliberately devising a binary image as the watermark, we introduced an error correcting code watermarking scheme, and applied it to the traditional embedded zerotree wavelet(EZW) watermarking algorithm.
Function reads sectors from disk into memory Error Correcting Code (ECC) function reads a sector or sectors from disk into memory parameter block format for PC/AT and PS/2 fixed disks INT 13H (0x13) Function 0A H (0x0A or 10) Read sector long
Theory analysis and computer simulation results of throughput of S-ALOHA-DS/CDMA are obtained using different error correcting code. And comparison results with MC-S-ALOHA system are also obtained.
It is a general practice, with the nonvolatile memories mentioned above, to execute error detection and correction processing based on ECC (Error Correcting Code) in order to improve the data retention characteristics. To be more specific, at the writing of data, an error correcting code is computed and the computed error correcting code is recorded to a nonvolatile memory along with the data, and, at the time of reading the data, the data and the error correcting code are read at the same time for bit error detection and correction processing. Assuming the error detection and correction processing like this makes it clear that the matching the unit of error correcting code with the unit of access to a nonvolatile memory is advantageous in performance. If no match is found between both the units, the error detection and correction processing based on an error correcting code is executed, so that a portion other than the data requested for access must also be read, thereby increasing the overhead in access processing.
The first ECC generation block 220 generates a first error correcting code (ECC) for the data held in the data buffer 210 in a write operation. The first ECC generated by the first ECC generation block 220 is stored in the NVM 300 as related with the data. Therefore, it is desired that this first ECC be an error correcting code for encoding on an access basis in the NVM 300. In addition, a BCH code may be used for the first ECC. It should be noted that, because an error correcting code has a function of error detection, the error correcting code may also be referred to as an error detection code. It should be noted that the first ECC generation block 220 is one example of a first error detection code generation block cited in the scope of claims herein.
The higher error rate necessitates an error correcting code (ECC) that can correct multiple bit errors; for example, the SandForce SF-2500 Flash Controller can correct up to 55 bits per 512-byte sector with an unrecoverable read error rate of less than one sector per 1017 bits read.
ECC stands for "Error Correcting Code". It is one kind of error correction and encryption-decryption algorithm. ECC technology can greatly improve the reliability of SSD. It the the prerequisite for Nand Flash to be used normally.
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Synonyms and analogies of "error correcting code" in English