microprocessor system BUS I, 8-bit and 16-bit data; part 3: mechanical and pin descriptions for the eurocard configuration with pin and socket (indirect) connectors
The monitoring apparatus of claim 4 wherein said microprocessor couples to a system bus for transmitting and receiving commands to units connected in common to said system bus and wherein said timer circuit means generates a second predetermined time interval of said number of predetermined time intervals which corresponds to an interval normally required for completing execution of an external command on said system bus by said microprocessor.
In a television receiver, for example, the receiver microprocessor controller may be used to generate the tri-state control signal TS for controlling components connected to the system bus.
Modern personal and server computers use higher-performance interconnection technologies such as HyperTransport and Intel QuickPath Interconnect, while the system bus architecture continued to be used on simpler embedded microprocessors.
The main processor system HP immediately accesses the multi-processor bus MPB and transmits a status signal M1 to all other microprocessor systems, which prevents the remaining microprocessor systems from accessing the base region of the common memory.
Figure la schematically illustrates the components of a portable computing device 100, which is an exemplary device used to illustrate the features of the present invention. The portable computing device 100 may take the form of a smartphone, a personal digital assistant (PDA), an e-reader, a tablet computer etc. The portable computing device 100 includes a processor 102 that is able to transmit control messages to, receive status information from, and transmit data to and from components within the portable computing device 100 that are connected to a system bus 104, where these components may include a non-volatile storage device 106, random access memory 108, user input interface 110, network interface 112 and graphics processing component 114. The processor 102, which in this embodiment is a microprocessor, processes instructions stored in the random access memory (RAM) 108 that have been loaded from the non-volatile storage device 106 which could be for example a flash memory or a hard disk drive. These instructions are in the form of computer software in the form of one or more programs that implement an operating system 118 and a client program. The RAM 108 is also used by programs running on the processor 102 as a means of storing and accessing data in the form of electronic signals where the data is used during the execution of the programs.
The communicator bus can also be referred to as a backplane, a module connection enabler, or system bus.
所述通信总线还可称为底板、模块连接使能器或系统总线。
For example, you wouldn't want ordinary user-level code to be able to gain access to the system bus and directly read internal communication.
例如,不希望普通用户级代码能够访问系统总线以及直接读取内部通信。
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