Vertaling van "complex programmable logic devices" in Chinees
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复杂可编程逻辑器件
A fiber field-bus communication system based on complex programmable logic devices(CPLD)and optical transceiver was designed for some special industrial fields such as colliery and airfields.
The Atmel EPLD product line comprises two major categories: simple programmable logic devices (SPLDs) and the higher density complex programmable logic devices (CPLDs).
The ATF15xx-DK2 is a second generation low-cost development programmer kit for the designer who wishes to begin working with Atmel's ATF15xx family of industry standard pin-compatible Complex Programmable Logic Devices (CPLD) with Logic Doubling. Like the original ATF15xx-DK, the "DK2" allows designers to design, synthesize, simulate, program and evaluate their designs using their choice of either free Atmel-WinCUPL design software or a 30-day free trial version of Atmel-ProChip Designer using any 84-pin ATF15xx device, such as those provided with the kit. In addition, the kit can be extended to be used to program all of the Atmel ATF15xx Family with different packages by simply adding the package adapters (only PLCC84 is included in the kit). Once the design is completed, the designer can install a sample ATF15xx Family device in the provided PCB and program it using the built-in ISP industry-standard 4-pin JTAG interface, ATMISP software, and PC parallel port cable provided. The tutorial included takes the designer through the complete CPLD development process. All software runs on PC Windows addition, mounting holes are provided to add wire-wrap terminals for all pins to allow comprehensive proto-typing and ATF15xx-DK2 includes everything a designer needs to get started with Atmel-Logic Doubling CPLDs.
The ATF15xx-DK3 is a third-generation low-cost development/programmer kit for the designer who wishes to begin working with Atmel's ATF15xx family of industry-standard pin-compatible Complex Programmable Logic Devices (CPLDs) with Logic Doubling.
The ATF15xx-DK2 is a second generation low-cost development programmer kit for the designer who wishes to begin working with Atmel's ATF15xx family of industry standard pin-compatible Complex Programmable Logic Devices (CPLD) with Logic Doubling. Like the original ATF15xx-DK, the "DK2" allows designers to design, synthesize, simulate, program and evaluate their designs using their choice of either free Atmel-WinCUPL design software or a 30-day free trial version of Atmel-ProChip Designer using any 84-pin ATF15xx device, such as those provided with the kit. In addition, the kit can be extended to be used to program all of the Atmel ATF15xx Family with different packages by simply adding the package adapters (only PLCC84 is included in the kit).
The Atmel CPLD Development/Programmer Kit is a complete development system and an In-System programmer for the ATF15xx family of industry standard pin compatible Complex Programmable Logic Devices with Logic Doubling kit provides designers a very quick and easy way to develop prototypes and evaluate new designs with an ATF15xx ISP CPLD. The ATF15xx family of ISP CPLDs includes the ATF15xxAS, ATF15xxASL, ATF15xxASV, ATF15xxASVL, and ATF15xxBE CPLDs. With the availablility of the different Socket Adapter Boards to support all the package types offered in the ATF15xx family of ISP CPLDs, this CPLD Development/Programmer Board can be used as an ISP programmer to program the ATF15xx ISP CPLDs in all the available package types through the industry standard JTAG interface (IEEE 1149.1)
A high performance 3-phases full controlled thyristor trigger is achieved by the complex programmable logic devices (CPLD) and the advanced EDA software.
Warp is a state-of-the-art HDL compiler for designing with Cypress Complex Programmable Logic Devices (CPLDs). Warp utilizes a subset of IEEE 1076/1164 VHDL and IEEE 1364 Verilog as its Hardware Description Languages (HDL) for design entry. Then, it synthesizes and optimizes the entered design, and outputs a JEDEC or Intel hex file for the desired PLD or CPLD. Warp also accepts VHDL or Verilog produced by the Active-HDL FSM graphical Finite State Machine editor. For simulation, Warp provides a timing simulator, as well as VHDL and Verilog timing models for use with third party simulators.
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