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complex programmable logic devices

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复杂可编程逻辑器件
A fiber field-bus communication system based on complex programmable logic devices(CPLD)and optical transceiver was designed for some special industrial fields such as colliery and airfields.
针对煤矿、机场等特殊工业现场,设计了一种基于复杂可编程逻辑器件(CPLD)和光模块的光纤现场总线通讯系统。
The Atmel EPLD product line comprises two major categories: simple programmable logic devices (SPLDs) and the higher density complex programmable logic devices (CPLDs).
Atmel EPLD 产品线主要包括两大类别:简单可编程逻辑器件 (SPLD) 和高密度复杂可编程逻辑器件 (CPLD ) 。
The ATF15xx-DK2 is a second generation low-cost development programmer kit for the designer who wishes to begin working with Atmel's ATF15xx family of industry standard pin-compatible Complex Programmable Logic Devices (CPLD) with Logic Doubling. Like the original ATF15xx-DK, the "DK2" allows designers to design, synthesize, simulate, program and evaluate their designs using their choice of either free Atmel-WinCUPL design software or a 30-day free trial version of Atmel-ProChip Designer using any 84-pin ATF15xx device, such as those provided with the kit. In addition, the kit can be extended to be used to program all of the Atmel ATF15xx Family with different packages by simply adding the package adapters (only PLCC84 is included in the kit). Once the design is completed, the designer can install a sample ATF15xx Family device in the provided PCB and program it using the built-in ISP industry-standard 4-pin JTAG interface, ATMISP software, and PC parallel port cable provided. The tutorial included takes the designer through the complete CPLD development process. All software runs on PC Windows addition, mounting holes are provided to add wire-wrap terminals for all pins to allow comprehensive proto-typing and ATF15xx-DK2 includes everything a designer needs to get started with Atmel-Logic Doubling CPLDs.
ATF15xx-DK2 是第二代低成本开发编程器套件,适用于希望使用 Atmel 的 ATF15xx 系列开始工作的设计人员,该系列包括行业标准的、引脚兼容的、带 Logic Doubling? 的复杂可编程逻辑器件 (CPLD)。如同最初的 ATF15xx-DK 一样,"DK2"允许设计人员对其设计进行设计、综合、仿真、编程和评估,可以使用免费的 Atmel-WinCUPL? 设计软件,或使用套件中提供的任何一款 84 引脚 ATF15xx 器件的 Atmel-ProChip Designer? 30 天免费试用版软件。此外,仅增加套件的封装适配器(套件中仅包括 PLCC84),便可对所有不同封装的 Atmel ATF15xx 系列进行编程。当完成设计之后,设计人员可以将 ATF15xx 系列样品器件安装在所提供的 PCB 上,使用提供的内置 ISP 行业标准 4 引脚 JTAG 接口、ATMISP 软件和 PC 并行端口线缆对其进行编程。所含教程可以引导设计人员完成 CPLD 开发的整个过程。所有软件均可在 PC Windows? 平台上运行。此外,为全部引脚提供有安装孔以增加绕线端子,从而可以进行全面的原型开发和评估。ATF15xx-DK2 包括设计人员开始使用 Atmel-Logic Doubling CPLD 所需的每件物品。
The ATF15xx-DK3 is a third-generation low-cost development/programmer kit for the designer who wishes to begin working with Atmel's ATF15xx family of industry-standard pin-compatible Complex Programmable Logic Devices (CPLDs) with Logic Doubling.
ATF15xx-DK3 是一款第三代低成本开发及编程套件,适用于希望开始使用 Atmel 的 ATF15xx 系列工作的设计人员,该系列包括行业标准的、引脚兼容的、带 Logic Doubling 的复杂可编程逻辑器件 (CPLD)。
The ATF15xx-DK2 is a second generation low-cost development programmer kit for the designer who wishes to begin working with Atmel's ATF15xx family of industry standard pin-compatible Complex Programmable Logic Devices (CPLD) with Logic Doubling. Like the original ATF15xx-DK, the "DK2" allows designers to design, synthesize, simulate, program and evaluate their designs using their choice of either free Atmel-WinCUPL design software or a 30-day free trial version of Atmel-ProChip Designer using any 84-pin ATF15xx device, such as those provided with the kit. In addition, the kit can be extended to be used to program all of the Atmel ATF15xx Family with different packages by simply adding the package adapters (only PLCC84 is included in the kit).
ATF15xx-DK2 是第二代低成本开发编程器套件,适用于希望使用 Atmel 的 ATF15xx 系列开始工作的设计人员,该系列包括行业标准的、引脚兼容的、带 Logic Doubling? 的复杂可编程逻辑器件 (CPLD) 。如同最初的 ATF15xx-DK 一样,"DK2"允许设计人员对其设计进行设计、综合、仿真、编程和评估,可以使用免费的 Atmel-WinCUPL? 设计软件,或使用套件中提供的任何一款 84 引脚 ATF15xx 器件的 Atmel-ProChip Designer? 30 天免费试用版软件。此外,仅增加套件的封装适配器(套件中仅包括 PLCC84),便可对所有不同封装的 Atmel ATF15xx 系列进行编程。
The Atmel CPLD Development/Programmer Kit is a complete development system and an In-System programmer for the ATF15xx family of industry standard pin compatible Complex Programmable Logic Devices with Logic Doubling kit provides designers a very quick and easy way to develop prototypes and evaluate new designs with an ATF15xx ISP CPLD. The ATF15xx family of ISP CPLDs includes the ATF15xxAS, ATF15xxASL, ATF15xxASV, ATF15xxASVL, and ATF15xxBE CPLDs. With the availablility of the different Socket Adapter Boards to support all the package types offered in the ATF15xx family of ISP CPLDs, this CPLD Development/Programmer Board can be used as an ISP programmer to program the ATF15xx ISP CPLDs in all the available package types through the industry standard JTAG interface (IEEE 1149.1)
Atmel CPLD 开发/编程器套件是一个完整的开发套件,也是用于 ATF15xx 系列的行业标准引脚兼容的、带 Logic Doubling 功能的复杂可编程逻辑器件的系统内编程器。此套件以 ATF15xx ISP CPLD 向设计人员提供非常快速且简单的方式来开发原型及评估新设计。ISP CPLD 的 ATF15xx 系列包括 ATF15xxAS、ATF15xxASL、ATF15xxASV、ATF15xxASVL 和 ATF15xxBE CPLD。此 CPLD 开发/编程器套件具有不同的插口适配器板以支持 ISP CPLD ATF15xx 系列中的全部封装类型,可用作 ISP 编程器,通过行业标准 JTAG 接口 (IEEE 1149.1) 对所有封装形式的 ATF15xx ISP CPLD 进行编程。
A high performance 3-phases full controlled thyristor trigger is achieved by the complex programmable logic devices (CPLD) and the advanced EDA software.
摘要采用复杂可编程逻辑芯片CPLD和先进的EDA设计软件,实现了高性能的三相全控桥晶闸管的数字触发器。
Warp is a state-of-the-art HDL compiler for designing with Cypress Complex Programmable Logic Devices (CPLDs). Warp utilizes a subset of IEEE 1076/1164 VHDL and IEEE 1364 Verilog as its Hardware Description Languages (HDL) for design entry. Then, it synthesizes and optimizes the entered design, and outputs a JEDEC or Intel hex file for the desired PLD or CPLD. Warp also accepts VHDL or Verilog produced by the Active-HDL FSM graphical Finite State Machine editor. For simulation, Warp provides a timing simulator, as well as VHDL and Verilog timing models for use with third party simulators.
Warp 是最先进的 HDL 编译器,适于对 Cypress 复杂可编程逻辑设备 (CPLD) 进行设计。Warp 使用 IEEE 1076/1164 VHDL 和 IEEE 1364 Verilog 的子集作为它的"硬件描述语言" (HDL) 用于设计输入。然后它综合并优化输入的设计,为所需的 PLD 或 CPLD 输出 JEDEC 或 Intel 十六进制文件。Warp 还可接受由 Active-HDL FSM 图形化"有限状态机"编辑器生成的 VHDL 或 Verilog。对于模拟来说,Warp 可提供一个时间模拟器,并可与第三方模拟器一起使用的 VHDL 和 Verilog 计时模型。
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