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dynamic random access memory
Definitie
Vertaling van "dynamic random access memory" in Chinees
Definitie
动态随机存取存储器
动态随机存取内存
动态随机存储器
动态随机存取记忆体
DDR2 SDRAM
The computing system of claim 1, where the host processor writes the encrypted code into dynamic random access memory (DRAM) from flash memory, the encrypted code including a first stage code and a second stage code for executing a two-stage boot process.
根据权利要求1所述的计算系统，其中，主处理机将加密代码从闪存写入动态随机存取存储器（DRAM），加密代码包括用于执行两阶段的启动过程的第一阶段代码和第二阶段代码。
In the memory segment, smartphones have been upgrading memory content for better performance, which has helped drive demand for and pricing of dynamic random access memory (DRAM) chips.
内存方面，智能手机一直在升级内存内容，从而实现更高的性能，这有利于推动动态随机存取存储器（DRAM）芯片的需求及定价。
Niche dynamic random access memory
利基动态随机存取内存
Memory Display type of dynamic random access memory
内存 显示型动态随机存取内存
Each new generation of the double data rate (DDR) synchronous dynamic random access memory (SDRAM) standard delivers significant improvements including increased speeds, reduced footprint, and improved power efficiency.
每一代新 的 DDR（双倍数据速率）SDRAM（同步动态随机存储器）标准都会在许多方面带来显著改 进，包括速度、尺寸和功率效率。
This has been upheld by the WTO panel on DRAMS (Dynamic Random Access Memory Semiconductors).
这得到世贸组织动态内存（动态随机存储器）案评判组的认可。
a dynamic random access memory (DRAM) connected with the first CPU
与第一CPU连接的动态随机存取存储器（DRAM）；
The ability to attain the required simulation rate at 1.2 μs was the decisive factor for adopting the NI FlexRIO platform for this system. Additionally, because the NI FlexRIO has a high-capacity, built-in dynamic random access memory, we could use the JMAG-RT model provided by JSOL Corp.'s JMAG software tool chain.
我们之所以决定采用NI FlexRIO平台主要是因为该平台可达到1.2 μs的仿真速率。 此外，NI FlexRIO内置有高容量的动态随机存取内存，这允许我们使用JSOL公司的JMAG软件工具链所提供的JMAG-RT模型， 从而使得该系统能够非常逼真地呈现真实发动机的高度非线性特性。
In an information processing device, a high-speed and high-density Dynamic Random Access Memory (DRAM) is widely used as a random access memory.
在信息处理装置中，广泛使用高速高密度动态随机存取存储器（DRAM）作为随机存取存储器。
To understand exactly how the consumption of power scales on newer generation servers using DDR3 technology DRAM (Dynamic Random Access Memory), the following results have been compiled for analysis.
若要准确了解耗电量如何在使用 DDR3 技术 DRAM（动态随机存取内存）的新一代服务器上按比例分布，汇总出了以下结果进行分析。
In-memory databases (IMDB) rely primarily on the use of high-capacity and, most importantly, high-performance DRAM (Dynamic Random Access Memory).
组建内存数据库 （IMDB）的关键在于足够大的DRAM（动态随机存取内存）容量，更重要的是性能也得足够强大。
As previously described in FIG. 1, router 40 (e.g., packet gateway 14 of FIG. 1) may service packet flows for millions of subscribers. As the number of subscribers increases, storage resources of PFE 60 may be consumed by filters programmed in hardware for each subscriber. In some examples, storage resources may include high-speed storage such as Reduced-Latency Dynamic Random Access Memory (RLDRAM) or Ternary Content Addressable Memory (TCAM). Such high-speed storage may have limited storage capacity and in some cases is costly. Techniques of the present disclosure as further described in FIG. 3 may reuse existing filters in PFE 60, i.e., filters already installed within forwarding plane 81 for existing packet flows of currently connected subscribers, to minimize duplicate storage of filters for newly connected subscribers and, therefore, improve storage efficiency.
如上文根据图1所述，路由器40（例如，图1所示的分组网关14）可为几百万个用户提供包流。由于用户数量，PFE 60的存储资源可由每个用户的硬件中编程的过滤器消耗。在某些示例中，存储资源可包括高速存储器，例如缩短等待时间的动态随机存取存储器（RLDRAM）或三态内容寻址存储器（TCAM）。这种高速存储器的存储能力可能有限，在某些情况下也较为昂贵。如图3所进一步描述的本发明的技术可在PFE 60中重用现有过滤器，即，已安装在当前连接用户的现有包流的转发平面81内的过滤器，以将新连接用户的过滤器的重复存储最小化，因此，提高了存储效率。
DRAM (Dynamic Random Access Memory) is the building block of DIMM (Dual In-Line Memory Module). Historically, a common parallel channel bus has been used to organize platform memory by connecting DIMMs to a central memory controller (MC), which offers connectivity to one or more channel buses.
DRAM（动态随机存取存储器）是 DIMM（双列直插式内存模块）的构建模块。过去，业界曾使用一种通用并行通道总线来组织平台内存，将DIMM与一个中央内存控制器相连接（MC）。这一内存控制器能够与1条或多条内存通道总线进行连接。
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Resultaten: 26. Exact: 26. Verstreken tijd: 21 ms.
