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logic-level
Vertaling van "logic-level" in Chinees
逻辑电平
逻辑级
While maintaining very high switch-off capability, logic-level devices allow direct drive by a microcontroller.
在保持极高关断能力的同时，逻辑电平器件可利用微控制器直接驱动。
Full-wave ringing level detector comparator with internal threshold, large hysteresis, and logic-level output
带有内部阈值、高滞后和逻辑电平输出的全波振铃电平检测比较器
The LTC6957 is a dual-output buffer, driver and logic translator, ideal for converting low frequency sine waves (up to 300MHz) into low phase noise logic-level signals in applications such as Gigabit wireless, gyroscopes, test and measurement, radio and satellite communications, medical imaging and GPS.
LTC6957 是一款双输出缓冲器、驱动器和逻辑转换器，非常适合在诸如千兆位无线、陀螺仪、测试和测量、无线电和卫星通信、医疗成像和 GPS 等应用中将低频正弦波转换为低相位噪声逻辑电平信号。
AS Series: 1/3 size of Series M switches. Specifically developed for logic-level applications. Antistatic superstructure of carbon blended polyacetal prevents static discharge to the contacts.
AS 系列：尺寸只有 M 系列开关的 1/3。专为逻辑电平应用而开发。上层结构采用混碳聚缩醛防静电材料，防止静电释放对触点造成损坏。
ST offers high-voltage ignition-coil power driver ICs based on our VIPower M1-3 technology, featuring a vertical-current-flow power Darlington pair and logic-level compatible driving circuit.
意法半导体推出的高压点火线圈电源驱动器IC基于VIPower M1-3技术，含有直角通电功率达林顿对和逻辑电平兼容驱动电路。
Their logic-level gate characteristics allow direct input from the microcontroller.
其逻辑级栅极特性让我们能够通过微控制器直接输入。
This paper presents design and implementation of the simulation module in a logic-level VHDL simulation system.
介绍了VHDL逻辑级模拟系统中模拟模块的设计和实现。
The VR Stamp is the first rapidly deployable speech module to use Sensory's proprietary Quick T2SI (text to speaker independent) technology, which allows developers to create working recognition sets in minutes. Multiple languages are supported, making the VR Stamp useful for products virtually anywhere in the world. Based on Sensory's RSC Family of microcontrollers, the VR Stamp is a completely modularized, production ready speech recognition system that allows products to speak and hear with minimal development time and low system cost. VR Stamp simplifies the integration of speech recognition into products by combining all key components into a small 40-pin DIP footprint module. A low-noise audio channel and standardized packaging allow rapid prototyping, less debugging and shorter time to market. The VR Stamp offers 24 I/O lines, as well as connections for a power, ground, microphone, speaker, and logic-level RS232 interface.
VR？Stamp 是首个可快速部署的语音模块，使用 Sensory 的专有 Quick T2SI？（文本到语音独立）技术，使开发人员在几分钟内就能建立工作识别集。VR Stamp 支持多种语言，几乎在世界任何地方都可使用。VR Stamp 使用 Sensory 的 RSC 系列微控制器，是一种完全模块化的可即刻投入生产的语音识别系统，它能使产品在最短的时间内以最低的系统成本实现听说功能。VR Stamp 将所有关键元件集成到一个小型的 40 引脚 DIP 模块，简化了集成语音识别功能的过程。低杂讯的音频信道和标准化封装可快速进行原型开发，减少调试时间和产品面市的时间。VR Stamp 提供 24 个 I/O 线路及用于电源、接地、麦克风、扬声器和逻辑电平 RS232 接口的连接。
The gate drive circuit is the interface between the power switches and the logic-level signals.
驱动电路作为 功率单元 与控制电路的接口，其性能对电磁干扰的影响十分重要。
The device also integrates an error amplifier and a logic-level MOSFET, simplifying the design of compact and ultra-low consumption SMPS (buck or flyback) with a 5 V output voltage.
该器件还集成了一个误差放大器和一个逻辑电平MOSFET（场效应管 ） ， 简化了采用5V输出的超低功耗SMPS（开关电源 ） （ 降压或反激）的设计。
The VIPer0P is characterized by a unique zero-power mode and is ideal for all SMPS up to 7 W with a wide input voltage range. The device also integrates an error amplifier and a logic-level MOSFET, simplifying the design of compact and ultra-low consumption SMPS (buck or flyback) with a 5 V output voltage.
VIPer0P具有独特的零功率模式和宽的输入电压范围（功率可高达7W），是所有开关电源的理想选择。该器件还集成了一个误差放大器和一个逻辑电平MOSFET（场效应管），简化了采用5V输出的超低功耗SMPS（开关电源）（降压或反激）的设计。
The VIPerPlus series 1 integrates an error amplifier and a logic-level MOSFET that makes it possible to build a simple and ultra-low consumption SMPS (buck, buck-boost or flyback) with a 5 V output voltage. A unique overvoltage protection and the 18 VDC drain voltage start up make it robust and reliable.
VIPerPlus series 1系列集成了一个误差放大器和一个逻辑电平MOSFET（场效应管），据此能够建立一个采用5V输出的简单超低功耗SMPS（开关电源）（降压，降压-升压和反激式）。独特的过压保护和18 VDC漏极电压启动功能使它更加稳健可靠。
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