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static timing analysis
Vertaling van "static timing analysis" in Chinees
静态时序分析
A new statistical model of gate delay and a new statistical static timing analysis method are proposed.
提出了一种新的门单元延迟的统计分析模型和一种新的统计静态时序分析方法。
We accomplished the full-chip static timing analysis of X microprocessor, and made a detailed analysis such as critical-path checking in the circuit.
参与并完成了X微处理器全芯片的静态时序分析工作，对电路的关键路径等重要信息进行了详细分析。
In static timing analysis, the word static alludes to the fact that this timing analysis is carried out in an input-independent manner, and purports to find the worst-case delay of the circuit over all possible input combinations.
静态时序分析中的"静态"一词，暗示了这种时序分析是一种与输入激励无关的方式进行的，并且其目的是通过遍历所有传输路径，寻找所有输入组合下电路的最坏延迟情况。
This is in contrast to static timing analysis, which has a similar goal as dynamic timing verification except it does not require simulating the real functionality of the IC.
该过程与静态时序分析相对应，后者与动态时序验证有着相似的目标，但是它并不需要对集成电路的实际功能进行仿真。
Every step in the IC design (such as static timing analysis, placement, routing, and so on) is already complex and often forms its own field of study.
集成电路设计的每个步骤（例如静态时序分析、布局、布线等）都是极其复杂的过程，并形成了若干专门的学科进行研究。
Static timing analysis plays a vital role in facilitating the fast and reasonably accurate measurement of circuit timing.
静态时序分析在电路时序快速、准确的测量中扮演了重要角色。
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Synoniemen voor static timing analysis in het Engels
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Resultaten: 6. Exact: 6. Verstreken tijd: 11 ms.
