this disclosure describes a clock circuit for a memory controller
power failure mode for a memory controller
read-write switching method for a memory controller
procédé de commutation lecture-écriture pour contrôleur de mémoire
In an embodiment, a memory controller includes multiple ports.
The systems include a memory controller.
this is performed by providing in a memory controller
a memory controller includes a register and an interface circuitry
It integrates a faster processor, powerful graphics, and a memory controller into a single chip.
Each node has a memory controller and is interconnected with other nodes using high speed interconnect links.
Self-calibration for a memory controller is performed by writing a voltage to a selected cell.
Choosing a memory controller design that meets the needs of the whole system is a complex issue.
Le choix d'un contrôleur de mémoire qui répond aux besoins de l'ensemble du système est une question complexe.
a microprocessor initiates a read request which is decoded by a memory controller
Embodiments of the invention include a memory controller to interface to memory.
Des modes de réalisation de l'invention concernent un contrôleur de mémoire pour interface de mémoire.