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Said test cells are equipped with: a test pattern memory that temporarily holds a test pattern; a driver that transmits a test signal to the test item according to said test pattern; a comparator that compares the output signal from the test item and the expected value corresponding to said test pattern and derives test results; and a test result memory for temporarily holding said test results.
Between the respective test cells, a test pattern wire is provided for transmitting said test pattern from the test pattern memory of the test cell on the upstream side to the test pattern memory of the test cell on the downstream side in the testing order for the test items.
A tester for testing a device under test comprising an instruction executing section for sequentially executing the instructions included in a test program of the device for each instruction cycle, a test pattern memory storing pattern length identification information for identifying the pattern length of a test pattern sequence outputted during an instruction cycle period of time during which the instructions are executed and the test pattern sequence after associating the information with each instruction, a test pattern memory read section for reading, from the test pattern memory, a test pattern sequence having a length corresponding to the pattern length identification information stored in the test pattern memory and associated with one instruction to be executed, and a test pattern output section for outputting, to a terminal of the device, the test pattern sequence read by the test pattern memory read section according to the one instruction during the instruction cycle period of time during which the one instruction is executed.
A test instrument comprising an instruction executing section for sequentially executing instructions contained an a test program, a predetermined pattern memory where a predetermined pattern series is stored in association with predetermined pattern identification information, a test pattern memory where a test pattern series outputted during an instruction cycle period or the predetermined pattern identification information for identifying a predetermined pattern series outputted during the instruction cycle period is stored in association with each instruction, a test pattern memory reading section for reading the test pattern series or the predetermined pattern identification information stored in the test pattern memory in association with one instruction, a predetermined pattern reading section for reading the predetermined pattern series associated with the predetermined pattern identification information when the predetermined pattern identification information is read, and a test pattern output section for outputting the test pattern series read by the test pattern memory reading section or the predetermined pattern series read by the predetermined pattern reading section to a terminal of the device under test during an instruction cycle period.
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